Add README.md

hls_2018/README.md

+# pynq-router (sw)
+
+PYNQ-router for Vivado-HLS (2018 ver.)
+
+## Types of router
+
+|Name|Operation name|Description|
+|:---|:---|:---|
+|01|TBD|Line-number-free router for PYNQ-Z1. Priority queue is implemented with circular array(non-parallel)|
+|02|TBD|Line-number-free router for PYNQ-Z1. Priority queue is implemented with circular array(parallel)|
+|03|TBD|Line-number-free router for PYNQ-Z1. Priority queue is implemented with heap(size:2^15)|
+|04|TBD|Line-number-free router for AVNET-Ultra96. Priority queue is implemented with heap(size:2^16)|
+
+## Memo
+
+* Vivado HLS 2018.2
+* Vivado 2018.2
+
+Options:
+* Part: xc7z020clg400-1 (PYNQ-Z1), xczu3eg-sbva484-1-i (AVNET-Ultra96)
+* Clock Period: 10.0 ns
+* Clock Uncertainty: 3.0 ns
+* Synthesis strategy: Vivado Synthesis Defaults
+* Implementation strategy: Vivado Implementation Defaults
+
+## I/O 
+* Input/Output: boardstr, seed, &status, return
+