diff --git a/hardware_design/190826_solver/design_1.bit b/hardware_design/190826_solver/design_1.bit
new file mode 100755
index 0000000000000000000000000000000000000000..0e045ed1242d502db05b70bcc1755aca3d4e9cd3
Binary files /dev/null and b/hardware_design/190826_solver/design_1.bit differ
diff --git a/hardware_design/190826_solver/design_1.hwh b/hardware_design/190826_solver/design_1.hwh
new file mode 100755
index 0000000000000000000000000000000000000000..5131ed421cdd959aa332367476665f96352f4a96
--- /dev/null
+++ b/hardware_design/190826_solver/design_1.hwh
@@ -0,0 +1,3729 @@
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
diff --git a/hardware_design/README.md b/hardware_design/README.md
new file mode 100644
index 0000000000000000000000000000000000000000..e69de29bb2d1d6434b8b29ae775ad8c2e48c5391
diff --git a/hardware_design/for_pynq_design/led_pin_assignment.xdc b/hardware_design/for_pynq_design/led_pin_assignment.xdc
new file mode 100755
index 0000000000000000000000000000000000000000..3b622a1386a06dbfb3850e87661cd0b68ab164c0
--- /dev/null
+++ b/hardware_design/for_pynq_design/led_pin_assignment.xdc
@@ -0,0 +1,8 @@
+set_property PACKAGE_PIN R14 [get_ports {led[0]}]
+set_property PACKAGE_PIN P14 [get_ports {led[1]}]
+set_property PACKAGE_PIN N16 [get_ports {led[2]}]
+set_property PACKAGE_PIN M14 [get_ports {led[3]}]
+set_property IOSTANDARD LVCMOS33 [get_ports {led[3]}]
+set_property IOSTANDARD LVCMOS33 [get_ports {led[2]}]
+set_property IOSTANDARD LVCMOS33 [get_ports {led[1]}]
+set_property IOSTANDARD LVCMOS33 [get_ports {led[0]}]
diff --git a/hardware_design/for_pynq_design/pynq_revC.tcl b/hardware_design/for_pynq_design/pynq_revC.tcl
new file mode 100755
index 0000000000000000000000000000000000000000..efee522576eebfa752c1e955dba0c777dbfb19fe
--- /dev/null
+++ b/hardware_design/for_pynq_design/pynq_revC.tcl
@@ -0,0 +1,879 @@
+proc getPresetInfo {} {
+ return [dict create name {PYNQ} description {PYNQ} vlnv xilinx.com:ip:processing_system7:5.5 display_name {PYNQ} ]
+}
+
+proc validate_preset {IPINST} { return true }
+
+
+proc apply_preset {IPINST} {
+return [dict create \
+ CONFIG.PCW_DDR_RAM_BASEADDR {0x00100000} \
+ CONFIG.PCW_DDR_RAM_HIGHADDR {0x1FFFFFFF} \
+ CONFIG.PCW_UART0_BASEADDR {0xE0000000} \
+ CONFIG.PCW_UART0_HIGHADDR {0xE0000FFF} \
+ CONFIG.PCW_UART1_BASEADDR {0xE0001000} \
+ CONFIG.PCW_UART1_HIGHADDR {0xE0001FFF} \
+ CONFIG.PCW_I2C0_BASEADDR {0xE0004000} \
+ CONFIG.PCW_I2C0_HIGHADDR {0xE0004FFF} \
+ CONFIG.PCW_I2C1_BASEADDR {0xE0005000} \
+ CONFIG.PCW_I2C1_HIGHADDR {0xE0005FFF} \
+ CONFIG.PCW_SPI0_BASEADDR {0xE0006000} \
+ CONFIG.PCW_SPI0_HIGHADDR {0xE0006FFF} \
+ CONFIG.PCW_SPI1_BASEADDR {0xE0007000} \
+ CONFIG.PCW_SPI1_HIGHADDR {0xE0007FFF} \
+ CONFIG.PCW_CAN0_BASEADDR {0xE0008000} \
+ CONFIG.PCW_CAN0_HIGHADDR {0xE0008FFF} \
+ CONFIG.PCW_CAN1_BASEADDR {0xE0009000} \
+ CONFIG.PCW_CAN1_HIGHADDR {0xE0009FFF} \
+ CONFIG.PCW_GPIO_BASEADDR {0xE000A000} \
+ CONFIG.PCW_GPIO_HIGHADDR {0xE000AFFF} \
+ CONFIG.PCW_ENET0_BASEADDR {0xE000B000} \
+ CONFIG.PCW_ENET0_HIGHADDR {0xE000BFFF} \
+ CONFIG.PCW_ENET1_BASEADDR {0xE000C000} \
+ CONFIG.PCW_ENET1_HIGHADDR {0xE000CFFF} \
+ CONFIG.PCW_SDIO0_BASEADDR {0xE0100000} \
+ CONFIG.PCW_SDIO0_HIGHADDR {0xE0100FFF} \
+ CONFIG.PCW_SDIO1_BASEADDR {0xE0101000} \
+ CONFIG.PCW_SDIO1_HIGHADDR {0xE0101FFF} \
+ CONFIG.PCW_USB0_BASEADDR {0xE0102000} \
+ CONFIG.PCW_USB0_HIGHADDR {0xE0102fff} \
+ CONFIG.PCW_USB1_BASEADDR {0xE0103000} \
+ CONFIG.PCW_USB1_HIGHADDR {0xE0103fff} \
+ CONFIG.PCW_TTC0_BASEADDR {0xE0104000} \
+ CONFIG.PCW_TTC0_HIGHADDR {0xE0104fff} \
+ CONFIG.PCW_TTC1_BASEADDR {0xE0105000} \
+ CONFIG.PCW_TTC1_HIGHADDR {0xE0105fff} \
+ CONFIG.PCW_FCLK_CLK0_BUF {true} \
+ CONFIG.PCW_FCLK_CLK1_BUF {false} \
+ CONFIG.PCW_FCLK_CLK2_BUF {false} \
+ CONFIG.PCW_FCLK_CLK3_BUF {false} \
+ CONFIG.PCW_UIPARAM_DDR_FREQ_MHZ {525} \
+ CONFIG.PCW_UIPARAM_DDR_BANK_ADDR_COUNT {3} \
+ CONFIG.PCW_UIPARAM_DDR_ROW_ADDR_COUNT {15} \
+ CONFIG.PCW_UIPARAM_DDR_COL_ADDR_COUNT {10} \
+ CONFIG.PCW_UIPARAM_DDR_CL {7} \
+ CONFIG.PCW_UIPARAM_DDR_CWL {6} \
+ CONFIG.PCW_UIPARAM_DDR_T_RCD {7} \
+ CONFIG.PCW_UIPARAM_DDR_T_RP {7} \
+ CONFIG.PCW_UIPARAM_DDR_T_RC {48.91} \
+ CONFIG.PCW_UIPARAM_DDR_T_RAS_MIN {35.0} \
+ CONFIG.PCW_UIPARAM_DDR_T_FAW {40.0} \
+ CONFIG.PCW_UIPARAM_DDR_AL {0} \
+ CONFIG.PCW_UIPARAM_DDR_DQS_TO_CLK_DELAY_0 {0.040} \
+ CONFIG.PCW_UIPARAM_DDR_DQS_TO_CLK_DELAY_1 {0.058} \
+ CONFIG.PCW_UIPARAM_DDR_DQS_TO_CLK_DELAY_2 {-0.009} \
+ CONFIG.PCW_UIPARAM_DDR_DQS_TO_CLK_DELAY_3 {-0.033} \
+ CONFIG.PCW_UIPARAM_DDR_BOARD_DELAY0 {0.223} \
+ CONFIG.PCW_UIPARAM_DDR_BOARD_DELAY1 {0.212} \
+ CONFIG.PCW_UIPARAM_DDR_BOARD_DELAY2 {0.085} \
+ CONFIG.PCW_UIPARAM_DDR_BOARD_DELAY3 {0.092} \
+ CONFIG.PCW_UIPARAM_DDR_DQS_0_LENGTH_MM {15.6} \
+ CONFIG.PCW_UIPARAM_DDR_DQS_1_LENGTH_MM {18.8} \
+ CONFIG.PCW_UIPARAM_DDR_DQS_2_LENGTH_MM {0} \
+ CONFIG.PCW_UIPARAM_DDR_DQS_3_LENGTH_MM {0} \
+ CONFIG.PCW_UIPARAM_DDR_DQ_0_LENGTH_MM {16.5} \
+ CONFIG.PCW_UIPARAM_DDR_DQ_1_LENGTH_MM {18} \
+ CONFIG.PCW_UIPARAM_DDR_DQ_2_LENGTH_MM {0} \
+ CONFIG.PCW_UIPARAM_DDR_DQ_3_LENGTH_MM {0} \
+ CONFIG.PCW_UIPARAM_DDR_CLOCK_0_LENGTH_MM {25.8} \
+ CONFIG.PCW_UIPARAM_DDR_CLOCK_1_LENGTH_MM {25.8} \
+ CONFIG.PCW_UIPARAM_DDR_CLOCK_2_LENGTH_MM {0} \
+ CONFIG.PCW_UIPARAM_DDR_CLOCK_3_LENGTH_MM {0} \
+ CONFIG.PCW_UIPARAM_DDR_DQS_0_PACKAGE_LENGTH {105.056} \
+ CONFIG.PCW_UIPARAM_DDR_DQS_1_PACKAGE_LENGTH {66.904} \
+ CONFIG.PCW_UIPARAM_DDR_DQS_2_PACKAGE_LENGTH {89.1715} \
+ CONFIG.PCW_UIPARAM_DDR_DQS_3_PACKAGE_LENGTH {113.63} \
+ CONFIG.PCW_UIPARAM_DDR_DQ_0_PACKAGE_LENGTH {98.503} \
+ CONFIG.PCW_UIPARAM_DDR_DQ_1_PACKAGE_LENGTH {68.5855} \
+ CONFIG.PCW_UIPARAM_DDR_DQ_2_PACKAGE_LENGTH {90.295} \
+ CONFIG.PCW_UIPARAM_DDR_DQ_3_PACKAGE_LENGTH {103.977} \
+ CONFIG.PCW_UIPARAM_DDR_CLOCK_0_PACKAGE_LENGTH {80.4535} \
+ CONFIG.PCW_UIPARAM_DDR_CLOCK_1_PACKAGE_LENGTH {80.4535} \
+ CONFIG.PCW_UIPARAM_DDR_CLOCK_2_PACKAGE_LENGTH {80.4535} \
+ CONFIG.PCW_UIPARAM_DDR_CLOCK_3_PACKAGE_LENGTH {80.4535} \
+ CONFIG.PCW_UIPARAM_DDR_DQS_0_PROPOGATION_DELAY {160} \
+ CONFIG.PCW_UIPARAM_DDR_DQS_1_PROPOGATION_DELAY {160} \
+ CONFIG.PCW_UIPARAM_DDR_DQS_2_PROPOGATION_DELAY {160} \
+ CONFIG.PCW_UIPARAM_DDR_DQS_3_PROPOGATION_DELAY {160} \
+ CONFIG.PCW_UIPARAM_DDR_DQ_0_PROPOGATION_DELAY {160} \
+ CONFIG.PCW_UIPARAM_DDR_DQ_1_PROPOGATION_DELAY {160} \
+ CONFIG.PCW_UIPARAM_DDR_DQ_2_PROPOGATION_DELAY {160} \
+ CONFIG.PCW_UIPARAM_DDR_DQ_3_PROPOGATION_DELAY {160} \
+ CONFIG.PCW_UIPARAM_DDR_CLOCK_0_PROPOGATION_DELAY {160} \
+ CONFIG.PCW_UIPARAM_DDR_CLOCK_1_PROPOGATION_DELAY {160} \
+ CONFIG.PCW_UIPARAM_DDR_CLOCK_2_PROPOGATION_DELAY {160} \
+ CONFIG.PCW_UIPARAM_DDR_CLOCK_3_PROPOGATION_DELAY {160} \
+ CONFIG.PCW_PACKAGE_DDR_DQS_TO_CLK_DELAY_0 {0.040} \
+ CONFIG.PCW_PACKAGE_DDR_DQS_TO_CLK_DELAY_1 {0.058} \
+ CONFIG.PCW_PACKAGE_DDR_DQS_TO_CLK_DELAY_2 {-0.009} \
+ CONFIG.PCW_PACKAGE_DDR_DQS_TO_CLK_DELAY_3 {-0.033} \
+ CONFIG.PCW_PACKAGE_DDR_BOARD_DELAY0 {0.223} \
+ CONFIG.PCW_PACKAGE_DDR_BOARD_DELAY1 {0.212} \
+ CONFIG.PCW_PACKAGE_DDR_BOARD_DELAY2 {0.085} \
+ CONFIG.PCW_PACKAGE_DDR_BOARD_DELAY3 {0.092} \
+ CONFIG.PCW_CPU_CPU_6X4X_MAX_RANGE {667} \
+ CONFIG.PCW_CRYSTAL_PERIPHERAL_FREQMHZ {50} \
+ CONFIG.PCW_APU_PERIPHERAL_FREQMHZ {650} \
+ CONFIG.PCW_DCI_PERIPHERAL_FREQMHZ {10.159} \
+ CONFIG.PCW_QSPI_PERIPHERAL_FREQMHZ {200} \
+ CONFIG.PCW_SMC_PERIPHERAL_FREQMHZ {100} \
+ CONFIG.PCW_USB0_PERIPHERAL_FREQMHZ {60} \
+ CONFIG.PCW_USB1_PERIPHERAL_FREQMHZ {60} \
+ CONFIG.PCW_SDIO_PERIPHERAL_FREQMHZ {50} \
+ CONFIG.PCW_UART_PERIPHERAL_FREQMHZ {100} \
+ CONFIG.PCW_SPI_PERIPHERAL_FREQMHZ {166.666666} \
+ CONFIG.PCW_CAN_PERIPHERAL_FREQMHZ {100} \
+ CONFIG.PCW_CAN0_PERIPHERAL_FREQMHZ {-1} \
+ CONFIG.PCW_CAN1_PERIPHERAL_FREQMHZ {-1} \
+ CONFIG.PCW_I2C_PERIPHERAL_FREQMHZ {25} \
+ CONFIG.PCW_WDT_PERIPHERAL_FREQMHZ {133.333333} \
+ CONFIG.PCW_TTC_PERIPHERAL_FREQMHZ {50} \
+ CONFIG.PCW_TTC0_CLK0_PERIPHERAL_FREQMHZ {133.333333} \
+ CONFIG.PCW_TTC0_CLK1_PERIPHERAL_FREQMHZ {133.333333} \
+ CONFIG.PCW_TTC0_CLK2_PERIPHERAL_FREQMHZ {133.333333} \
+ CONFIG.PCW_TTC1_CLK0_PERIPHERAL_FREQMHZ {133.333333} \
+ CONFIG.PCW_TTC1_CLK1_PERIPHERAL_FREQMHZ {133.333333} \
+ CONFIG.PCW_TTC1_CLK2_PERIPHERAL_FREQMHZ {133.333333} \
+ CONFIG.PCW_PCAP_PERIPHERAL_FREQMHZ {200} \
+ CONFIG.PCW_TPIU_PERIPHERAL_FREQMHZ {200} \
+ CONFIG.PCW_FPGA0_PERIPHERAL_FREQMHZ {100} \
+ CONFIG.PCW_FPGA1_PERIPHERAL_FREQMHZ {50} \
+ CONFIG.PCW_FPGA2_PERIPHERAL_FREQMHZ {50} \
+ CONFIG.PCW_FPGA3_PERIPHERAL_FREQMHZ {50} \
+ CONFIG.PCW_ACT_APU_PERIPHERAL_FREQMHZ {650.000000} \
+ CONFIG.PCW_UIPARAM_ACT_DDR_FREQ_MHZ {525.000000} \
+ CONFIG.PCW_ACT_DCI_PERIPHERAL_FREQMHZ {10.096154} \
+ CONFIG.PCW_ACT_QSPI_PERIPHERAL_FREQMHZ {200.000000} \
+ CONFIG.PCW_ACT_SMC_PERIPHERAL_FREQMHZ {10.000000} \
+ CONFIG.PCW_ACT_ENET0_PERIPHERAL_FREQMHZ {125.000000} \
+ CONFIG.PCW_ACT_ENET1_PERIPHERAL_FREQMHZ {10.000000} \
+ CONFIG.PCW_ACT_USB0_PERIPHERAL_FREQMHZ {60} \
+ CONFIG.PCW_ACT_USB1_PERIPHERAL_FREQMHZ {60} \
+ CONFIG.PCW_ACT_SDIO_PERIPHERAL_FREQMHZ {50.000000} \
+ CONFIG.PCW_ACT_UART_PERIPHERAL_FREQMHZ {100.000000} \
+ CONFIG.PCW_ACT_SPI_PERIPHERAL_FREQMHZ {10.000000} \
+ CONFIG.PCW_ACT_CAN_PERIPHERAL_FREQMHZ {10.000000} \
+ CONFIG.PCW_ACT_CAN0_PERIPHERAL_FREQMHZ {23.8095} \
+ CONFIG.PCW_ACT_CAN1_PERIPHERAL_FREQMHZ {23.8095} \
+ CONFIG.PCW_ACT_I2C_PERIPHERAL_FREQMHZ {50} \
+ CONFIG.PCW_ACT_WDT_PERIPHERAL_FREQMHZ {108.333336} \
+ CONFIG.PCW_ACT_TTC_PERIPHERAL_FREQMHZ {50} \
+ CONFIG.PCW_ACT_PCAP_PERIPHERAL_FREQMHZ {200.000000} \
+ CONFIG.PCW_ACT_TPIU_PERIPHERAL_FREQMHZ {200.000000} \
+ CONFIG.PCW_ACT_FPGA0_PERIPHERAL_FREQMHZ {100.000000} \
+ CONFIG.PCW_ACT_FPGA1_PERIPHERAL_FREQMHZ {50.000000} \
+ CONFIG.PCW_ACT_FPGA2_PERIPHERAL_FREQMHZ {50.000000} \
+ CONFIG.PCW_ACT_FPGA3_PERIPHERAL_FREQMHZ {50.000000} \
+ CONFIG.PCW_ACT_TTC0_CLK0_PERIPHERAL_FREQMHZ {108.333336} \
+ CONFIG.PCW_ACT_TTC0_CLK1_PERIPHERAL_FREQMHZ {108.333336} \
+ CONFIG.PCW_ACT_TTC0_CLK2_PERIPHERAL_FREQMHZ {108.333336} \
+ CONFIG.PCW_ACT_TTC1_CLK0_PERIPHERAL_FREQMHZ {108.333336} \
+ CONFIG.PCW_ACT_TTC1_CLK1_PERIPHERAL_FREQMHZ {108.333336} \
+ CONFIG.PCW_ACT_TTC1_CLK2_PERIPHERAL_FREQMHZ {108.333336} \
+ CONFIG.PCW_CLK0_FREQ {100000000} \
+ CONFIG.PCW_CLK1_FREQ {50000000} \
+ CONFIG.PCW_CLK2_FREQ {50000000} \
+ CONFIG.PCW_CLK3_FREQ {50000000} \
+ CONFIG.PCW_OVERRIDE_BASIC_CLOCK {0} \
+ CONFIG.PCW_CPU_PERIPHERAL_DIVISOR0 {2} \
+ CONFIG.PCW_DDR_PERIPHERAL_DIVISOR0 {2} \
+ CONFIG.PCW_SMC_PERIPHERAL_DIVISOR0 {1} \
+ CONFIG.PCW_QSPI_PERIPHERAL_DIVISOR0 {5} \
+ CONFIG.PCW_SDIO_PERIPHERAL_DIVISOR0 {20} \
+ CONFIG.PCW_UART_PERIPHERAL_DIVISOR0 {10} \
+ CONFIG.PCW_SPI_PERIPHERAL_DIVISOR0 {1} \
+ CONFIG.PCW_CAN_PERIPHERAL_DIVISOR0 {1} \
+ CONFIG.PCW_CAN_PERIPHERAL_DIVISOR1 {1} \
+ CONFIG.PCW_FCLK0_PERIPHERAL_DIVISOR0 {10} \
+ CONFIG.PCW_FCLK1_PERIPHERAL_DIVISOR0 {20} \
+ CONFIG.PCW_FCLK2_PERIPHERAL_DIVISOR0 {20} \
+ CONFIG.PCW_FCLK3_PERIPHERAL_DIVISOR0 {20} \
+ CONFIG.PCW_FCLK0_PERIPHERAL_DIVISOR1 {1} \
+ CONFIG.PCW_FCLK1_PERIPHERAL_DIVISOR1 {1} \
+ CONFIG.PCW_FCLK2_PERIPHERAL_DIVISOR1 {1} \
+ CONFIG.PCW_FCLK3_PERIPHERAL_DIVISOR1 {1} \
+ CONFIG.PCW_ENET0_PERIPHERAL_DIVISOR0 {8} \
+ CONFIG.PCW_ENET1_PERIPHERAL_DIVISOR0 {1} \
+ CONFIG.PCW_ENET0_PERIPHERAL_DIVISOR1 {1} \
+ CONFIG.PCW_ENET1_PERIPHERAL_DIVISOR1 {1} \
+ CONFIG.PCW_TPIU_PERIPHERAL_DIVISOR0 {1} \
+ CONFIG.PCW_DCI_PERIPHERAL_DIVISOR0 {52} \
+ CONFIG.PCW_DCI_PERIPHERAL_DIVISOR1 {2} \
+ CONFIG.PCW_PCAP_PERIPHERAL_DIVISOR0 {5} \
+ CONFIG.PCW_TTC0_CLK0_PERIPHERAL_DIVISOR0 {1} \
+ CONFIG.PCW_TTC0_CLK1_PERIPHERAL_DIVISOR0 {1} \
+ CONFIG.PCW_TTC0_CLK2_PERIPHERAL_DIVISOR0 {1} \
+ CONFIG.PCW_TTC1_CLK0_PERIPHERAL_DIVISOR0 {1} \
+ CONFIG.PCW_TTC1_CLK1_PERIPHERAL_DIVISOR0 {1} \
+ CONFIG.PCW_TTC1_CLK2_PERIPHERAL_DIVISOR0 {1} \
+ CONFIG.PCW_WDT_PERIPHERAL_DIVISOR0 {1} \
+ CONFIG.PCW_ARMPLL_CTRL_FBDIV {26} \
+ CONFIG.PCW_IOPLL_CTRL_FBDIV {20} \
+ CONFIG.PCW_DDRPLL_CTRL_FBDIV {21} \
+ CONFIG.PCW_CPU_CPU_PLL_FREQMHZ {1300.000} \
+ CONFIG.PCW_IO_IO_PLL_FREQMHZ {1000.000} \
+ CONFIG.PCW_DDR_DDR_PLL_FREQMHZ {1050.000} \
+ CONFIG.PCW_SMC_PERIPHERAL_VALID {0} \
+ CONFIG.PCW_SDIO_PERIPHERAL_VALID {1} \
+ CONFIG.PCW_SPI_PERIPHERAL_VALID {0} \
+ CONFIG.PCW_CAN_PERIPHERAL_VALID {0} \
+ CONFIG.PCW_UART_PERIPHERAL_VALID {1} \
+ CONFIG.PCW_EN_EMIO_CAN0 {0} \
+ CONFIG.PCW_EN_EMIO_CAN1 {0} \
+ CONFIG.PCW_EN_EMIO_ENET0 {0} \
+ CONFIG.PCW_EN_EMIO_ENET1 {0} \
+ CONFIG.PCW_EN_PTP_ENET0 {0} \
+ CONFIG.PCW_EN_PTP_ENET1 {0} \
+ CONFIG.PCW_EN_EMIO_GPIO {0} \
+ CONFIG.PCW_EN_EMIO_I2C0 {0} \
+ CONFIG.PCW_EN_EMIO_I2C1 {0} \
+ CONFIG.PCW_EN_EMIO_PJTAG {0} \
+ CONFIG.PCW_EN_EMIO_SDIO0 {0} \
+ CONFIG.PCW_EN_EMIO_CD_SDIO0 {0} \
+ CONFIG.PCW_EN_EMIO_WP_SDIO0 {0} \
+ CONFIG.PCW_EN_EMIO_SDIO1 {0} \
+ CONFIG.PCW_EN_EMIO_CD_SDIO1 {0} \
+ CONFIG.PCW_EN_EMIO_WP_SDIO1 {0} \
+ CONFIG.PCW_EN_EMIO_SPI0 {0} \
+ CONFIG.PCW_EN_EMIO_SPI1 {0} \
+ CONFIG.PCW_EN_EMIO_UART0 {0} \
+ CONFIG.PCW_EN_EMIO_UART1 {0} \
+ CONFIG.PCW_EN_EMIO_MODEM_UART0 {0} \
+ CONFIG.PCW_EN_EMIO_MODEM_UART1 {0} \
+ CONFIG.PCW_EN_EMIO_TTC0 {0} \
+ CONFIG.PCW_EN_EMIO_TTC1 {0} \
+ CONFIG.PCW_EN_EMIO_WDT {0} \
+ CONFIG.PCW_EN_EMIO_TRACE {0} \
+ CONFIG.PCW_USE_AXI_NONSECURE {0} \
+ CONFIG.PCW_USE_M_AXI_GP0 {0} \
+ CONFIG.PCW_USE_M_AXI_GP1 {0} \
+ CONFIG.PCW_USE_S_AXI_GP0 {0} \
+ CONFIG.PCW_USE_S_AXI_GP1 {0} \
+ CONFIG.PCW_USE_S_AXI_ACP {0} \
+ CONFIG.PCW_USE_S_AXI_HP0 {0} \
+ CONFIG.PCW_USE_S_AXI_HP1 {0} \
+ CONFIG.PCW_USE_S_AXI_HP2 {0} \
+ CONFIG.PCW_USE_S_AXI_HP3 {0} \
+ CONFIG.PCW_M_AXI_GP0_FREQMHZ {10} \
+ CONFIG.PCW_M_AXI_GP1_FREQMHZ {10} \
+ CONFIG.PCW_S_AXI_GP0_FREQMHZ {10} \
+ CONFIG.PCW_S_AXI_GP1_FREQMHZ {10} \
+ CONFIG.PCW_S_AXI_ACP_FREQMHZ {10} \
+ CONFIG.PCW_S_AXI_HP0_FREQMHZ {10} \
+ CONFIG.PCW_S_AXI_HP1_FREQMHZ {10} \
+ CONFIG.PCW_S_AXI_HP2_FREQMHZ {10} \
+ CONFIG.PCW_S_AXI_HP3_FREQMHZ {10} \
+ CONFIG.PCW_USE_DMA0 {0} \
+ CONFIG.PCW_USE_DMA1 {0} \
+ CONFIG.PCW_USE_DMA2 {0} \
+ CONFIG.PCW_USE_DMA3 {0} \
+ CONFIG.PCW_USE_TRACE {0} \
+ CONFIG.PCW_TRACE_PIPELINE_WIDTH {8} \
+ CONFIG.PCW_INCLUDE_TRACE_BUFFER {0} \
+ CONFIG.PCW_TRACE_BUFFER_FIFO_SIZE {128} \
+ CONFIG.PCW_USE_TRACE_DATA_EDGE_DETECTOR {0} \
+ CONFIG.PCW_TRACE_BUFFER_CLOCK_DELAY {12} \
+ CONFIG.PCW_USE_CROSS_TRIGGER {0} \
+ CONFIG.PCW_FTM_CTI_IN0 {